1. Technical Field
The present disclosure relates to semiconductor packaging technology and, particularly, to a packaging substrate, a method for manufacturing the packaging substrate, and a chip packaging structure having the packaging substrate.
2. Description of Related Art
A chip packaging structure includes a packaging substrate, a connecting substrate, and a number of chips. Some of the chips are arranged on and are electrically connected to the packaging substrate, and the other chips are arranged on and are electrically connected to the connecting substrate. The packaging substrate is mechanically and electrically connected to the connecting substrate through a number of solder balls, which are formed between one surface of the packaging substrate and an opposing surface of the connecting surface. However, the binding force between the packaging substrate and the connecting surface is limited because the contact areas between the solder balls and the surfaces are limited. Thus, the solder balls are easily damaged if the chip packaging structure is touched when in transport or in use. This will make the chip packaging structure not work normally and safe.
Therefore, it is desirable to provide a packaging substrate, a method for manufacturing the packaging substrate, and a chip packaging structure having the packaging substrate, to overcome or at least alleviate the above-mentioned problems.